linker switch from thumb to arm mode even cortex m4 doesn't support it
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
GNU Arm Embedded Toolchain |
New
|
Undecided
|
Unassigned |
Bug Description
gcc version 5.4.1 20160919 (release) [ARM/embedded-
We have problems in veneers for functions that is known from a symbol file. Veneers for other functions that exists in the elf file is ok. Maybe only the pie, position independent codes are affected. Let me show an example
I have an already done elf image let's call it applet.elf and I would like to create an independent binary file let's call it pie.elf that would be a pie, position independent code and it would use some functions from the applet.elf
first, I compiled applet.elf with -mthumb -mcpu=cortex-m4 -mno-thumb-
applet.elf contains printf function and xprintf.txt contains a symbol for xprintf function
xprintf.txt:
xprintf = 0x0809b575 ;
After this I compile the pie.elf that simple calls the printf and the xprintf functions with the following parameters:
-fpie -nostdlib -mthumb -mcpu=cortex-m4 -mno-thumb-
Now let's see the generated code and the problems we have with radare but before this I show something
arm-none-
0809b575 g *ABS* 00000000 xprintf
0809b55c g F .text 00000028 printf
I don't know what that zero means at xprintf if I call this function from applet.elf it works well but maybe this info will be useful later
ok let's see the disassembled code
0x00000000 80b5 push {r7, lr}
0x00000002 00af add r7, sp, 0
0x00000004 054b ldr r3, [pc, 20] ; (0x0000001c)
0x00000006 7b44 add r3, pc ; add 0x2e
0x00000008 1846 mov r0, r3
0x0000000a 00f011f8 bl 0x00000030 ; [1] call printf_veneer 0x00000030()
0x0000000e 044b ldr r3, [pc, 16] ; (0x00000020)
0x00000010 7b44 add r3, pc ; add 0x2c
0x00000012 1846 mov r0, r3
0x00000014 00f008e8 blx 0x00000028 ;[2] call xprintf_veneer 0x00000028()
0x00000018 00bf nop
0x0000001a 80bd pop {r7, pc}
0x0000001c 2e00 movs r6, r5
0x0000001e 0000 movs r0, r0
0x00000020 2c00 movs r4, r5
0x00000022 0000 movs r0, r0
0x00000024 0000 movs r0, r0
0x00000026 0000 movs r0, r0
0x00000028 04f01fe5 ; <UNDEFINED> 0xf004e51f ;[3] 0x00004a6a()
0x0000002c 75b5 push {r0, r2, r4, r5, r6, lr}
0x0000002e 0908 lsrs r1, r1, 32
0x00000030 5ff800f0 ldr.w pc, [pc] ; 0x00000034
0x00000034 d117 asrs r1, r2, 31
0x00000036 0a08 lsrs r2, r1, 32
0x00000038 7465 str r4, [r6, 84] ; string: test\n
0x0000003a 7374 strb r3, [r6, 17]
0x0000003c 0a00 movs r2, r1
0x0000003e 0000 movs r0, r0
0x00000040 7465 str r4, [r6, 84] ; string test2\n
0x00000042 7374 strb r3, [r6, 17]
0x00000044 320a lsrs r2, r6, 8
0x00000046 0000 movs r0, r0
As you can see the opcode of xprintf_veneer is wrong. Maybe the linker switch from thumb to arm mode even cortex m4 doesn't support it
information type: | Public → Public Security |
information type: | Public Security → Private Security |
information type: | Private Security → Public |
as you can see test2_veneer compiled/linked as non-thumb code.
00008028 <__test1_veneer>: veneer+ 0x4>
8028: f85f f000 ldr.w pc, [pc] ; 802c <__test1_
802c: 08000015 .word 0x08000015
00008030 <__test2_veneer>:
8030: f004 e51f ; <UNDEFINED> instruction: 0xf004e51f
8034: f0000001 .word 0xf0000001