Assembler silently changing branch instruction

When compiling the following asm code with gcc version 10.2.1 20201103 (release) (GNU Arm Embedded Toolchain 10-2020-q4-major, binary package, Win 10):

.cpu cortex-m23
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 1
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.text
.align 1
.globl count_asm
.arch armv8-m.base
.syntax unified
.code 16
.thumb_func
.fpu softvfp
.type count_asm, function

count_asm:
cmp r0, r0
beq LABEL3
.rept 256
NOP
.endr
LABEL3:
NOP

the generated object file will contain the beq.w (T3) instruction, which results in a hard fault on the Cortex-M23 since it doesn't support it:

Disassembly of section .text:

00000000 <count_asm>:
0: 4280 cmp r0, r0
2: f000 8100 beq.w 206 <LABEL3>
6: 46c0 nop ; (mov r8, r8)
...
204: 46c0 nop ; (mov r8, r8)

00000206 <LABEL3>:
206: 46c0 nop ; (mov r8, r8)

Expected behavior: The assembler should generate a conditional branch out of range error, instead of silently changing it to the wide format.

If I remove the .syntax unified line, it stops with the aforementioned error, as it should.