[Feature]Enabling chipset support for the Edisonville microserver product
Bug #1083965 reported by
XiongZhang
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
intel |
Fix Released
|
Undecided
|
Unassigned | ||
linux (Ubuntu) |
Fix Released
|
Undecided
|
Tim Gardner | ||
Raring |
Fix Released
|
Undecided
|
Tim Gardner | ||
pciutils (Ubuntu) |
Fix Released
|
Undecided
|
Tim Gardner | ||
Raring |
Fix Released
|
Undecided
|
Tim Gardner |
Bug Description
Enabling device support in the OS for Dual Atom System on a Chip (SOC) processor (Avoton). The Avoton SOC will include Dual Atom processors, memory controller, SATA, uart, SMBUS, USB and Intel Legacy Block(ILB - lpc, timers, smbus (i2c_801)). The drivers for Avotom would require device ID changes to the exsisting drivers only.
Upstream schedule:
-Hw SDV: late March ’13
-Kernel: TBD
information type: | Private → Public |
Changed in linux (Ubuntu Raring): | |
assignee: | nobody → Tim Gardner (timg-tpi) |
status: | New → Fix Committed |
Changed in pciutils (Ubuntu Raring): | |
assignee: | nobody → Tim Gardner (timg-tpi) |
status: | New → In Progress |
Changed in linux (Ubuntu Raring): | |
status: | Fix Released → Fix Committed |
Changed in intel: | |
status: | New → Fix Released |
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The pci.ids has been submitted to sourceforge and the kernel patches have been merged in kernel v3.9, with the exception of the iSMT patches: cc7e6d2cc2e41af 0d12ea637f
1.
commit c2db409cbc8751c
Author: Seth Heasley <email address hidden>
Date: Wed Jan 30 15:25:32 2013 +0000
i2c: i801: SMBus patch for Intel Avoton DeviceIDs
This patch adds the PCU SMBus DeviceID for the Intel Avoton SOC.
Signed-off-by: Seth Heasley <email address hidden>
Reviewed-by: Jean Delvare <email address hidden>
Signed-off-by: Wolfram Sang <email address hidden>
2. 589f09c3ee139c8 0f6da274e4
commit 29e674dd5c8e781
Author: Seth Heasley <email address hidden>
Date: Fri Jan 25 12:01:05 2013 -0800
ahci: AHCI-mode SATA patch for Intel Avoton DeviceIDs
This patch adds the AHCI and RAID-mode SATA DeviceIDs for the Intel Avoton SOC.
Signed-off-by: Seth Heasley <email address hidden>
Signed-off-by: Jeff Garzik <email address hidden>
3. eeb4fdeb4637b9f 9df50a1dd9
commit aaa515277db9585
Author: Seth Heasley <email address hidden>
Date: Fri Jan 25 11:57:05 2013 -0800
ata_piix: IDE-mode SATA patch for Intel Avoton DeviceIDs
This patch adds the IDE-mode SATA DeviceIDs for the Intel Avoton SOC.
Signed-off-by: Seth Heasley <email address hidden>
Signed-off-by: Jeff Garzik <email address hidden>