[EHL][TGL][ADL] PMU support

Please find the following patches in the above external link

0001-perf-x86-intel-Read-call-chain-from-CET-shadow-stack.perf
0002-perf-header-Support-HYBRID_TOPOLOGY-feature.perf
0003-perf-header-Support-HYBRID_CPU_PMU_CAPS-feature.perf
0004-perf-list-Support-cputype-option-to-list-core-only-or.perf
0005-perf-list-Display-pmu-prefix-for-partially-supported-.perf
0006-perf-stat-Support-cputype-option-for-hybrid-events.perf
0007-perf-util-Check-existing-of-mem-loads-auxiliary-event.perf
0008-perf-mem-Support-for-hybrid-platform.perf
0009-perf-c2c-Support-for-hybrid-platform.perf
0010-perf-stat-Merge-event-counts-from-all-hybrid-PMUs.perf
0011-perf-stat-Support-hybrid-topdown-option.perf
0012-perf-stat-Support-metrics-with-hybrid-events.perf
0013-perf-evsel-Adjust-hybrid-event-and-global-event-mixed.perf
0014-perf-x86-intel-Fix-CET-config-name.perf
0015-perf-x86-intel-Fix-a-fixed-counter-check-warning-for-.perf
0016-perf-x86-intel-uncore-Fix-invalid-unit-check.perf
0017-perf-list-Skip-the-invalid-hybrid-pmu.perf
0018-perf-x86-intel-Disable-TSX-events-for-the-hybrid-conf.perf
0019-perf-vendor-events-intel-Add-core-event-list-for-Elkh.perf

0001-perf-x86-intel-Read-call-chain-from-CET-shadow-stack.perf
0002-perf-header-Support-HYBRID_TOPOLOGY-feature.perf --> f7d74ce32fc1b9b3cbf58c015009d1f616e60c23
0003-perf-header-Support-HYBRID_CPU_PMU_CAPS-feature.perf --> e119083bab80c2550065f6c0f10ba225a894595e
0004-perf-list-Support-cputype-option-to-list-core-only-or.perf
0005-perf-list-Display-pmu-prefix-for-partially-supported-.perf
0006-perf-stat-Support-cputype-option-for-hybrid-events.perf
0007-perf-util-Check-existing-of-mem-loads-auxiliary-event.perf --> ddc11da5eb37e27a4b66cddcaf11233ef51b3a79
0008-perf-mem-Support-for-hybrid-platform.perf --> 4a9086adc329c9460aefc563969b24eed534adba
0009-perf-c2c-Support-for-hybrid-platform.perf --> 79e157b00853af0e96d76997a93feec476a23bfa
0010-perf-stat-Merge-event-counts-from-all-hybrid-PMUs.perf
0011-perf-stat-Support-hybrid-topdown-option.perf
0012-perf-stat-Support-metrics-with-hybrid-events.perf
0013-perf-evsel-Adjust-hybrid-event-and-global-event-mixed.perf --> 1fcc57b7e51e4366f074c7d186ccc6c99a627a51
0014-perf-x86-intel-Fix-CET-config-name.perf
0015-perf-x86-intel-Fix-a-fixed-counter-check-warning-for-.perf --> ee72a94ea4a6d8fa304a506859cd07ecdc0cf5c4
0016-perf-x86-intel-uncore-Fix-invalid-unit-check.perf
0017-perf-list-Skip-the-invalid-hybrid-pmu.perf
0018-perf-x86-intel-Disable-TSX-events-for-the-hybrid-conf.perf --> drop it
0019-perf-vendor-events-intel-Add-core-event-list-for-Elkh.perf --> cdb29a8fd0c9fff693cd7b7e14a8f4e9e7cf00ed

The following patches may also have mainline commits (need to be confirmed by Intel):

0004-perf-list-Support-cputype-option-to-list-core-only-or.perf (0e0ae8742207c3b477cf0357b8115cec7b19612c)

0005-perf-list-Display-pmu-prefix-for-partially-supported-.perf (6c93f39f2f435d822c2f765650f405acebdc49fc)

0016-perf-x86-intel-uncore-Fix-invalid-unit-check.perf (e2bb9fab08cbcc7922050c7eb0bd650807abfa4e)

The following patches are already in intel-5.13-next
0015-perf-x86-intel-Fix-a-fixed-counter-check-warning-for-.perf (6ef0ee6946c78f32c830b71e07f4a6e5560d315b)

@ Alex Hung (alexhung)

Thanks for your check and the mainline commits ID in #3 are correct.

@chaoqin,

I pushed the patches to https://code.launchpad.net/~alexhung/+git/focal/+ref/iotg-adl/1943541 with comments above.

Please have a look and keep me posted if there are improvements or fixes to be made

@chaoqin,

How is it necessary to test this patchset to confirm these patches are correctly integrated into a kernel?

Two patches are also required for 0008 and 0009

d2f327acc638 perf tools: Support pmu prefix for mem-load event
e7ce8d11bfb0 perf tools: Check if mem_events is supported for hybrid platform

Without them, the following patches cannot be clearly cherry-picked and compile (i.e make perf in tools/ will fail)

perf mem: Support record for hybrid platform
perf c2c: Support record for hybrid platform

There are 7 patches (see below or #2 and #3) that aren't in upstream yet. Does Intel have plans to submit them to upstream? If not, what is the reason?

UBUNTU: SAUCE: perf/x86/intel: Read call chain from CET
UBUNTU: SAUCE: perf stat: Support --cputype option for
UBUNTU: SAUCE: perf stat: Merge event counts from all
UBUNTU: SAUCE: perf stat: Support hybrid --topdown
UBUNTU: SAUCE: perf stat: Support metrics with hybrid
UBUNTU: SAUCE: perf/x86/intel: Fix CET config name
UBUNTU: SAUCE: perf list: Skip the invalid hybrid pmu

Hi Alex,

You could remove the CET ones cause CET is abandoned temporarily.

UBUNTU: SAUCE: perf/x86/intel: Read call chain from CET
UBUNTU: SAUCE: perf/x86/intel: Fix CET config name

The following one has been upstreamed in v5.14-rc2
UBUNTU: SAUCE: perf list: Skip the invalid hybrid pmu --> 49afa7f6c714ab3f5cb2a4c835f7f9dddc0bb2c1

And the other ones are still in development or under review and I will update the upstream status from time to time

For the question in comment #7, we will validate this feature by LTP-DDT which is internal test suit. Maybe you need to confirm with Sachin or Apoorv about this.

For Test Cases:
https://collectd.org/wiki/index.php/Plugin:Intel_PMU

Please backport the following commit into v5.15 kernel.

6c93f39f2f435d822c2f765650f405acebdc49fc perf list: Display pmu prefix for partially supported hybrid cache events

Jira ticket: https://warthogs.atlassian.net/browse/CQT-38