Comment 8 for bug 1722849

The latest comment by David Brown seems to address the real issue and seems to fix the problem in my experiments. This is an acceptable fix of this "bug" for me, although the issue is perhaps worth documenting to help others to avoid this pitfall in the future.

In summary, here is the correct code for disabling interrupts by "saving and restoring interrupt status" for Cortex-M0(+):

/* critical section (save and restore interrupt status) */
#define CRIT_ENTRY(primask_) do { \
    __asm volatile ("mrs %0,PRIMASK" : "=r" (primask_) :: ); \
    __asm volatile ("cpsid i" :: "" (primask_) : ); \
} while (0)

#define CRIT_EXIT(primask_) \
    __asm volatile ("msr PRIMASK,%0" :: "r" (primask_) : )

Here is the intended use of this critical section:

uint32_t status;
. . .
CRIT_ENTRY(status);
/* inside critical section */
CRIT_EXIT(status);
. . .

Please feel free to improve on this code.

--MMS