Comment 11 for bug 579337

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A possible XML-based implementation would probably also benefit from supporting some sort of "include" directive, so that we could maintain a library with common components that could simply be included in related XML files.

Concerning the mnemonics specs, instruction timing could also be specified using "clock cycles", so that we could specify timing properties for individual instructions by using the number of clock cycles required to execute an instruction.

In this sense, we might also want to have an additional attribute that specifies the default clock rate, and also whether this should be dynamically configurable for each processor.

Possible candidates to determine common requirements, may include:
 - 8080
 - 8085
 - 8086
 - 8088
 - 8051

All of these are fairly common and pretty widely used in various educational settings, thus there's
plenty of information availableon each of them. So that we can easily come up with an requirements
analysis to emulate each individual chip and instruction.

Hopefully, we could then generalize each instruction, so that we end up with maybe 10-20 "primitives"
that would be configurable via XML, such primitives would then be handled by a corresponding FSM.